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Semiconductors and electronics hardware

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Companies design and make the tiny chips inside phones, cars, computers and AI servers, and assemble them into finished electronic devices.

The big idea: One chip passes through many specialist companies in many countries: design software, chip designers, machine makers, factories (fabs), packaging plants and device assemblers. Design needs huge research budgets and fabs cost tens of billions of dollars, so each step is dominated by a few firms. Because fab costs are mostly fixed, profit swings hard with how full the factories are, which makes the industry cyclical, now amplified by the AI boom and by government policy.

One unit, in numbers
One advanced logic wafer made by a foundry: USD 18,000 comes in, and USD 9,200 (51%) is left after its own costs.What is left is the unit's contribution, before the costs of the whole company. See the worked example
Typical margin
About 35 percent on average; from about 3 percent in electronics assembly to 55 to 60 percent for the leadersRoughly how much of every 100 of sales (or income) is left as profit after the running costs. More on margin
Capital intensity
HighA lot of money must be tied up before the business earns anything, so the return on that money matters as much as the margin. More on capital intensity
The number to watch
Fab utilisationWafers actually processed divided by what the fab could process. Because costs are fixed, profit swings far more than revenue when it moves.

Ask this first in a case

Which step of the value chain is the client in: design, equipment, fab, packaging or assembly?

Words used above (4)
Wafer:
A thin disc of silicon on which many chips are made at once.
Fab:
A chip factory, full of very expensive machines in ultra-clean rooms.
Foundry:
A company that makes chips designed by others, such as TSMC.
Utilisation:
How full a fab is: wafers processed divided by capacity.

The industry's other words are explained in Words to know (12).

On this page (17 sections)

How money is made

  • Fabless designers sell chips they designed but paid a foundry to make, earning on the design and the software around it.
  • Foundries charge per processed wafer; the price rises steeply for the newest manufacturing generations (nodes).
  • Equipment makers sell machines costing millions to hundreds of millions of dollars each, plus service contracts on the installed base.
  • Design tool and IP firms earn licence fees and royalties on every chip shipped with their designs.
  • Memory makers sell high volumes at market prices that swing with the cycle.
  • Contract assemblers charge a small margin on high volumes of finished phones, servers and PCs.

Worked example: one unit

Unit economics means the money in and out for one unit of the business. Start from the revenue, take away the unit's own costs, and what is left is its contribution. More on unit economics

The unit: One advanced (3 nanometre class) logic wafer made by a foundry, sold at an assumed USD 18,000. Illustrative, rounded figures.
LineAmountShare
Price paid by the chip designer for one processed waferUSD 18,000100%
Minus Depreciation of machines and cleanrooms, per wafer at about 90 percent utilisationUSD 4,30024%
Minus Materials: bare silicon wafer, chemicals, gases and masksUSD 1,2006.7%
Minus Electricity and waterUSD 4002.2%
Minus Fab staffUSD 6003.3%
Minus Maintenance, spare parts and other fab costsUSD 7003.9%
Minus Share of research and development for the next nodesUSD 1,3007.2%
Minus Share of sales, general and administrative costsUSD 3001.7%
What is left (contribution)USD 9,20051%

Check: USD 18,000 minus USD 8,800 of costs leaves USD 9,200.

So what: Gross margin is 60 percent and about half the price is left as profit, close to the leading foundry's reported margins. Depreciation is the biggest cost and does not fall when orders do, so utilisation is the lever: at 70 percent instead of 90 percent, depreciation per wafer rises by about USD 1,200 and profit per wafer drops by more than a tenth, before any price cuts. Holding the technology lead is what keeps the price high.

Key measures(8)

Key measures (also called KPIs, key performance indicators) are the numbers people in this industry track. Ask for the first one or two early in a case.

  • Fab utilisation

    Wafers actually processed divided by what the fab could process. Because costs are fixed, profit swings far more than revenue when it moves.

    Typical: in the module's illustrative foundry, break-even is about two thirds

  • Wafer starts and capacity

    Wafers a fab begins processing each month, and the most it can start. Capacity takes years to add.

  • Gross margin

    Revenue minus the direct cost of making the chips, divided by revenue. It shows pricing power and how full the fabs are. Glossary: Gross margin

    Typical: about 59 percent on average for US chip firms; about 71 percent at Nvidia, 62 percent at TSMC, 53 percent at ASML, about 6 percent at Foxconn[1]

  • R&D share of revenue

    Research and development spending divided by revenue. Chips are among the most research-heavy industries.

    Typical: above 15 percent every year for more than 20 years at US chip firms; in 2025 they spent USD 76.8 billion on R&D against USD 425 billion of sales, about 18 percent (our calculation from SIA figures)[6]

  • Yield

    The share of chips on a wafer that work. Higher yield means more good chips from the same wafer cost. Glossary: Yield

  • Process node mix

    How much revenue comes from each manufacturing generation (for example 3 nanometre). Newer nodes earn higher prices.

    Typical: 7 nanometre and newer made up 77 percent of TSMC's wafer revenue in late 2025[7]

  • Book-to-bill

    New orders divided by shipments. Above 1 means demand is growing; below 1 warns of a slowdown. Glossary: Book-to-bill

  • Days of inventory

    Inventory divided by daily cost of sales, at the chip firm and at its customers. Rising inventory warns that a downturn is coming.

First questions to ask

When a case lands in this industry, these questions get you to the numbers that matter.

  1. Which step of the value chain is the client in: design, equipment, fab, packaging or assembly?
  2. Which kind of chip (logic, memory, analog and power) and which end market (AI and data centres, phones, cars, industry)?
  3. Where are we in the cycle: utilisation, inventory at customers, and book-to-bill?
  4. How concentrated are customers and suppliers, and is demand committed in contracts?
  5. Which government policies apply: export controls, tariffs and subsidies?

Value chain: where the margin sits

The value chain is the steps a product or service passes through, from the first supplier to the customer. Each step below shows how much of the value it keeps. More on value chains

  1. Step 1: Design software (EDA) and licensed designs (IP)

    Fat margin

    Synopsys and Cadence (US) for design tools; Arm (UK) for licensed processor designs

    Small in revenue, but every chip designer needs these tools and licences.

  2. Step 2: Chip design

    Fat margin

    Fabless designers such as Nvidia, AMD, Qualcomm, Broadcom and MediaTek; integrated makers (IDMs) such as Intel, Texas Instruments and Infineon also design

    Leaders with unique products earn very high gross margins; Nvidia earned about 71 percent in fiscal 2026.

  3. Step 3: Manufacturing equipment and materials

    Fat margin

    ASML (Netherlands) for lithography; Applied Materials, Lam Research and KLA (US); Tokyo Electron (Japan); wafer and chemical suppliers

    ASML is the only maker of the most advanced (EUV) lithography machines; its 2025 gross margin was about 53 percent.

  4. Step 4: Wafer fabrication (foundry)

    Margin varies

    TSMC (Taiwan), Samsung Foundry (Korea), GlobalFoundries, UMC, SMIC (China)

    Very profitable for the leading-edge leader (TSMC operating margin 54 percent in late 2025), much thinner for followers.

  5. Step 5: Memory chips

    Margin varies

    Samsung and SK hynix (Korea), Micron (US)

    Close to a commodity: prices and profits boom and bust with supply and demand.

  6. Step 6: Assembly, test and packaging

    Thin margin

    ASE (Taiwan), Amkor (US), JCET (China), with plants in Malaysia, Vietnam, the Philippines and now India

    Advanced packaging that joins AI chips with memory is scarce and earns more.

  7. Step 7: Electronics assembly (contract manufacturing)

    Thin margin

    Foxconn (Hon Hai), Pegatron and Wistron (Taiwan); Tata Electronics and Dixon (India)

    Foxconn earned an operating margin of about 3 percent in 2025.

  8. Step 8: Devices and data centres

    Margin varies

    Apple, Samsung, carmakers, PC makers, and cloud firms that fill data centres with servers

    Data centres, cloud and AI infrastructure have their own brief.

Profit pool: who keeps the money

Where in the value chain the profit ends up, which is often not where most of the sales are. More on profit pools

Profit piles up at the few firms that own a bottleneck: the leading AI chip designers, the leading-edge foundry, the lithography machine maker and the design tool makers. Memory makers earn big profits in booms and losses in busts. Packaging and contract electronics assembly handle huge volumes on thin margins.

Cost structure(5)

The main costs, each as a share of revenue (the money from sales).

Cost of making the product (wafers, depreciation, materials, packaging)
about 29 to 40 percent at the leaders (Nvidia 29 percent in fiscal 2026, TSMC 38 percent in late 2025); about 41 percent on average for US chip firms[7]
Research and development
about 8 to 20 percent (above 15 percent every year for more than 20 years at US chip firms; Nvidia about 9 percent of a very large revenue)[6]
Sales, general and administrative
often below 5 percent at the largest firms (Nvidia about 2 percent)[8]
Capital spending on fabs (not in the income statement, but paid in cash)
roughly 40 percent of revenue at the leading foundry (a 2026 budget of USD 52 to 56 billion, against USD 33.7 billion of revenue in the last quarter of 2025, our calculation); low for fabless designers[7]
Operating profit left over
about 35 percent on average for US chip firms; 54 to 60 percent for the AI and foundry leaders; about 3 percent for contract electronics assembly[1]

Benchmarks(7)

Typical figures for the industry, to check a client's numbers against.

Global chip sales
about USD 792 to 796 billion in 2025, up about 26 percent[5]SIA first reported USD 791.7 billion and later cited USD 795.6 billion after revisions.
Global chip sales forecast for 2026
about USD 1.5 trillion (WSTS forecast cited by SIA, July 2026)[5]In February 2026 SIA projected roughly USD 1 trillion; forecasts rose fast during 2026 as AI chip demand grew. A forecast, not a result.
Operating margin before tax, US semiconductor firms
about 35 percent[1]January 2026 data.
Sales per USD 1 of invested capital, US semiconductor firms
about USD 1.2[2]An average that mixes asset-light fabless designers with very capital-heavy fabs.
TSMC share of the top 10 foundries' revenue
about 72.5 percent in the second quarter of 2026[11]
US-headquartered firms' share of global chip sales
about 53 percent in 2025, the highest since 1984[5]
Chips' share of an AI server rack's value
more than 95 percent[5]

Typical cases(7)

Case prompts you might hear in this industry.

  • Should we build a new fab, and at which node?
  • Our chip revenue fell 30 percent this year. Why, and what should we do?
  • Should an electronics maker move assembly from China to India or Vietnam?
  • How do we make our chip supply chain more resilient against one-country risk?
  • New export controls block part of our sales to China. How do we respond?
  • How big is the market for AI accelerator chips in five years?
  • Should a government offer subsidies to attract a chip plant?

Common traps(6)

Mistakes candidates make in this industry, and what to do instead.

  • Treating all chips as one market. Memory, logic and analog have very different prices, margins and cycles.
  • Assuming today's boom will last. The industry is cyclical; check inventory and orders.
  • Forgetting that a fab takes years to build and ramp up, so capacity decisions are long-term bets.
  • Ignoring export controls, tariffs and subsidies, which can decide where things are built and sold.
  • Assuming a lower-wage country is cheaper overall without counting yield, logistics, tariffs and ramp-up time.
  • Reaching for a generic framework instead of the real driver of this industry. Instead, start from fab utilization and the cycle: how loaded is the factory, and is inventory building up?

What changed, 2024 to 2026(5)

Recent changes a case could turn on.

  • AI turned a normal cycle into a record boom. Global chip sales grew about 26 percent in 2025, and SIA cited a WSTS forecast of about USD 1.5 trillion for 2026. Nvidia reported fiscal 2026 revenue of USD 215.9 billion, USD 193.7 billion of it from data centre products.[5]
  • US export controls keep changing. In May 2025 the Commerce Department rescinded the AI Diffusion Rule that would have ranked countries into tiers for AI chip imports. From January 2026, licences to export chips such as Nvidia's H200 and AMD's MI325X to China are reviewed case by case under strict conditions. Any case with China or AI chips must check the current rules.[13]
  • Manufacturing is even more concentrated. TrendForce estimates put TSMC at about 72.5 percent of the top 10 foundries' revenue in the second quarter of 2026, and TSMC set a record 2026 capital budget of USD 52 to 56 billion. Customers ask how to reduce reliance on one company and one island.[11]
  • New locations, backed by subsidies. Micron opened India's first semiconductor assembly and test plant in Sanand, Gujarat, in February 2026, and companies have announced more than USD 770 billion of US chip investments since 2020. Site selection and subsidy cases follow.[14]
  • AI data centres now pull the whole chain: chips are more than 95 percent of an AI server rack's value and more than half of AI data centre capital spending. The data centres, cloud and AI infrastructure brief covers the buildings, power and cloud side.[5]

Players by region(7)

Well-known companies in each region. You do not need to learn them by heart; they help you picture the market.

Global
  • TSMC (Taiwan, foundry)
  • Samsung and SK hynix (Korea, memory and foundry)
  • Nvidia (AI chips)
  • ASML (Netherlands, lithography)
United States
  • Nvidia, AMD, Qualcomm, Broadcom (fabless design)
  • Intel, Texas Instruments, Micron (integrated makers)
  • Applied Materials, Lam Research, KLA (equipment)
  • Synopsys, Cadence (design tools)
Europe
  • ASML (Netherlands)
  • Infineon (Germany, power and car chips)
  • STMicroelectronics (France and Italy)
  • NXP (Netherlands)
  • Arm (UK, chip designs)
Middle East
  • GlobalFoundries (US foundry, majority owned by Abu Dhabi's Mubadala)
  • Tower Semiconductor (Israel, specialty foundry)
  • Intel's fabs in Israel
  • G42 (UAE, AI data centres)
India
  • Micron (assembly and test plant in Sanand, Gujarat)
  • Tata Electronics (fab being built in Dholera, and electronics assembly)
  • Dixon (electronics assembly)
  • Large chip design centres of global firms in Bengaluru and Hyderabad
Southeast Asia
  • Malaysia (assembly and test hub: Intel in Penang and Kulim, Infineon in Melaka and Kulim)
  • Singapore (fabs of GlobalFoundries, Micron and UMC)
  • Vietnam (assembly by Intel, Amkor and Samsung)
China
  • SMIC and Hua Hong (foundry)
  • Huawei HiSilicon (design)
  • CXMT and YMTC (memory)
  • JCET (packaging)

Words to know(12)

Linked words have a fuller entry in the glossary.

Wafer
A thin disc of silicon on which many chips are made at once.
Die
One chip cut from a wafer.
Fab
A chip factory, full of very expensive machines in ultra-clean rooms.
Foundry (glossary entry)
A company that makes chips designed by others, such as TSMC.
Fabless (glossary entry)
A chip company that designs chips but pays a foundry to make them.
IDM
Integrated device maker: a company that both designs and makes its chips.
Process node
A manufacturing generation, such as 3 nanometre; newer nodes pack in more transistors.
Yield (glossary entry)
The share of chips on a wafer that work.
Utilisation
How full a fab is: wafers processed divided by capacity.
EUV lithography
Extreme ultraviolet light machines that print the finest chip patterns, made only by ASML.
HBM
High-bandwidth memory: stacked memory chips packaged next to AI processors.
Export controls
Government rules that limit which chips and machines can be sold to which countries.

Business model patterns

The ways of making money this industry follows. Spot the pattern in a new industry and you already know the first questions to ask.

Moves common in this industry

Sources(14)

Facts checked on . Worked examples are illustrative, shaped by these sources rather than one company's figures.

  1. 1.Aswath Damodaran, NYU Stern: operating and net margins by industry (US), data as of January 2026 (opens in a new tab)
  2. 2.Aswath Damodaran, NYU Stern: capital expenditures by industry (US), data as of January 2026 (opens in a new tab)
  3. 3.CNBC: hyperscalers face capex scrutiny after the Alphabet report (July 2026) (opens in a new tab)
  4. 4.Semiconductor Industry Association: global annual semiconductor sales increase 25.6 percent to USD 791.7 billion in 2025 (official) (opens in a new tab)
  5. 5.Semiconductor Industry Association: 2026 State of the Industry Report (July 2026, official) (opens in a new tab)
  6. 6.Semiconductor Industry Association: 2025 Factbook (May 2025, official) (opens in a new tab)
  7. 7.TSMC: fourth quarter 2025 results and 2026 outlook, Form 6-K (SEC filing, official, January 2026) (opens in a new tab)
  8. 8.NVIDIA: financial results for the fourth quarter and fiscal 2026 (official) (opens in a new tab)
  9. 9.ASML: fourth quarter and full year 2025 results, Form 6-K (SEC filing, official, January 2026) (opens in a new tab)
  10. 10.I-Connect007: Foxconn reports record FY2025 revenue (March 2026) (opens in a new tab)
  11. 11.Taipei Times: TSMC's market share edges higher (September 2026, citing TrendForce) (opens in a new tab)
  12. 12.US Bureau of Industry and Security: Commerce rescinds the AI Diffusion Rule and strengthens chip export controls (May 2025, official) (opens in a new tab)
  13. 13.US Bureau of Industry and Security: Commerce revises license review policy for semiconductors exported to China (January 2026, official) (opens in a new tab)
  14. 14.Micron: opening of India's first semiconductor assembly and test facility, Sanand (February 2026, official) (opens in a new tab)

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